LDMOS (Lateral Diffused Metal Oxide Semiconductor) devices are widely used for high breakdown voltage, high current and good thermal performance in many applications including laptop, server and DC/DC converter.
A LDMOS device commonly comprises a number of transistors which are formed in pairs. FIG. 1 shows cross-sectional view of a LDMOS device comprising a pair of transistors T1 and T2 formed in an N well 16. Each transistor comprises a drain pickup region 11, a source region 12, a gate 13, while the two transistors share a common body region 14 and a body pickup region 15. For performance and cost reasons, many modern applications require smaller power devices in a smaller package. Much focus has been placed on drain region engineering that includes RESURF (Reduced Surface Field), graded doped drain. Another area of focus is on making the source region smaller. As shown in FIG. 1, a source/body region consists of the body pickup region 15 in the center and the source regions 12 located on both sides of the body pickup region 15, which form an N+/P+/N+ region. Reducing the N+/P+/N+ region would result in a smaller source region. But usually the minimum area of the N+/P+/N+ region is limited by the photo-masking equipment's capability.